Conferences

1. Mamatha, I., Raksha, R. and Dinesh, P., “Design of 32-Function-32-Bit Arithmetic and Logical Unit (ALU)”, In 2024 IEEE 9th International Conference for Convergence in Technology (I2CT), pp. 1-5. (IEEE)
2. Sanketh Prabhu, Mamatha I, Shardul Phatak, “Vision Controlled Matter Smart Home Solution for Dysdiadochokinesia Patients”, 14^th International Conference on Computing Communication and Networking Technologies (ICCCNT), at IIT, Delhi, pp.1-7. (IEEE).
3. Hema Sundari, P.Nirisha, K.Srujan, Mamatha I., ”Self Powered Automatic Railway Platform without using Stair case” , 14^th International Conference on Computing Communication and Networking Technologies (ICCCNT), at IIT, Delhi, pp.1-7.(IEEE).
4. Jyoti Laxman Pakhale, and Mamatha I, “Comparative Study of Different Current Control Techniques for Single Phase Grid Integrated Photovoltaic System.” 2018 IEEE International Conference on Advances in Computing, Communications and Informatics (ICACCI), September 2018 at PESIT, Bangalore, 1259-1266. (IEEE)
5. Devipriya, D., V. Sushma Sri, and Mamatha I, “Smart Store Assistor for Visually Impaired.” 2018 IEEE International Conference on Advances in Computing, Communications and Informatics (ICACCI), September 2018 at PESIT, Bangalore, 1038-1045. (IEEE)
6. Asokan, P. Athira, and I. Mamatha. “A Novel Approach to Wireless Power Transfer.” 2017 IEEE International Conference on Technological Advancements in Power and Energy (TAP Energy), 2017, at ASE, Amritapuri pp. 1-6. (IEEE)
7. Mamatha, I., Shikha Tripathi, and T. S. B. Sudarshan. “Convolution based Efficient Architecture for 1-D DWT.” 2017 IEEE International Conference on Computing, Communication and Automation (ICCCA), 2017 at Galgotias University, Greater Noida, pp.1436-1440. (IEEE)
8. Mamatha I, Shikha Tripathi, Sudarshan TSB, ” Pipelined Architecture for Filter Bank based 1-D DWT”, 3rd International Conference on Signal Processing and Integrated Networks (SPIN-2016), 11^th– 12^th Feb 2016 at AMITY University, Noida, pp.47-52. (IEEE)
9. Ronith , V.S. Samhitha, Mamatha I, “Wireless Transmission of Solar Power using Inductive Resonant Principle”, 2016- Biennial International Conference on PESTSE 2016, 21^st-23^rd Jan 2016 at ASE, Bangalore, pp.1-6. (IEEE)
10. Krishna Gopinathan, Mamatha I, ” Average Current Mode Controlled DC – DC Converter using Digital Controllers”, 2016- Biennial International Conference on PESTSE 2016, 21^st-23^rd Jan 2016 at ASE, Bangalore, pp.1-6. (IEEE)
11. Vidya Chandran, Mamatha I, Shikha Tripathi, ” NEDA Based Hybrid Architecture for DCT – HWT”, Second International Conference on VLSI SATA 2016, 10-12^th Jan 2016 at ASE, Bangalore, pp.1-6. (IEEE)
12. Bala Sai SVB, Mamatha I, Shikha Tripathi, Sudarshan TSB, “Modified MLBF based Architecture for 1-D DWT”, 2015 IEEE International Conference on Computational Intelligence and Computing (ICCIC 2015), 10-12^th Dec 2015, pp.1-4. (IEEE)
13. Krishna Gopinathan, Mamatha I, “Pre-regulated push pull converter for hybrid energy systems”, 2015 International Conference on Advancements in Power and Energy (TAP Energy), June 2015 at ASE, Amritapuri, pp. 121- (IEEE)
14. Mamatha I, Nikhita Raj J, ShikhaTripathi, Sudarshan TSB, “Systolic Architecture Implementation of 1D DFT and 1D DCT”, IEEE International Conference on Signal Processing, Informatics, Communication and Energy Systems (SPICES-2015,19^th– 21^st Feb 2015 at NIT, Calicut, pp.1-5. (IEEE)
15. Mamatha I, Nikhita Raj J, Shikha Tripathi, Sudarshan TSB, “Reduced Complexity Architecture for Convolution Based DCT”, Intl. Symp. Electronic System Design (ISED 2013), 12^th -13^th Dec, 2013 at NTU, Singapore, pp.67-71. (IEEE)

By - Dr. MAMATHA I.

• Presented the research paper entitled “Design and Analysis of Four Port Router for Network-On-Chip Applications” in the Second International Conference on Artificial Intelligence, Computational Electronics and Communication System (AICECS 2023), organized by the Department of Electronics and Communication Engineering, Manipal Institute of Technology, Manipal.
• Presented the research paper entitled “Novel Design of Ripple Carry Adder using High Speed 12T Hybrid MOS Transistors” in the Second International Conference on Artificial Intelligence, Computational Electronics and Communication System (AICECS 2023), organized by the Department of Electronics and Communication Engineering, Manipal Institute of Technology, Manipal.
• Samanth, R., Chaitanya, C.V.S., Nayak, G.S., “Power Reduction of a Functional unit using RT-Level Clock-Gating and Operand Isolation”, 2019 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER), Manipal, India, 2019, pp. 1-4, DOI: 10.1109/DISCOVER47552.2019.9008025.
• Samanth, R., Amin, A., Nayak, S.G., “Design and Implementation of 32-bit Functional Unit for RISC architecture applications”, 2020 IEEE 5th International Conference on Devices, Circuits and Systems (ICDCS), Coimbatore, India, 2020, pp.46-48, DOI:10.1109/ICDCS48716.2020.243545. 28
• Samanth, R., S., P., Nayak, S.G., “High-Speed Hybrid Tree Multiplier Hardware using modified Wallace and Dadda Method”, AIP Conference Proceedings, vol. 2358, no.1, p. 080014. AIP Conference Proceedings LLC, 2021.
• Samanth, R., Joshi, S.S., Nayak, S.G., “Design and Implementation of High-Performance Hybrid Adders”, AIP Conference Proceedings, vol. 2357, no.1, p. 020003. AIP Publishing LLC, 2022.
• Sahu, A.K., Samanth, R., Mendez, T., Nayak, S.G., Kedlaya, K.V., “VLSI design techniques for low power MAC unit: A review”, AIP Conference Proceedings, vol.2358, No. 1, p. 050013. AIP Publishing LLC, Jul 30, 2021.

By - DR. RASHMI SAMANTH