Expert Talk on Verilog Design and Applications – August 20, 2025

The Department of Electronics and Communication Engineering, in collaboration with the ISTE Student Chapter and the Co-curricular Cell, successfully organized an expert talk on Verilog Design and Applications for the final-year ECE students on August 20, 2025, at 11:15 a.m. The event took place in the Seminar Hall of the Admin Block, with Mr. Hariprasad from Anmaya Technologies, Udupi, serving as the resource person.

The program began with a warm floral welcome extended to the guest by Mr. Arun Upadhyaya, Head of the Department. Mr. Hariprasad delivered an engaging and insightful session covering both the fundamentals and practical aspects of Verilog. He explained the significance of Verilog in digital design and compared it with other programming languages, highlighting its unique features and advantages. Students were introduced to the design and implementation of Half Adder and Full Adder circuits using Verilog, as well as the concept of Design Under Test (DUT), which plays a vital role in the simulation and verification of digital circuits.

The lecture also explored the different modelling styles in Verilog, namely Dataflow, Structural, and Behavioural modelling, with clear explanations on how each differs in approach and application. Mr. Hariprasad further elaborated on circuit designs generated through case statements, switch statements, and if-else constructs, showcasing their practical impact on hardware implementation. Another key highlight was the discussion on clocking statements, along with the distinctions between the always block and the initial block, providing students with a deeper understanding of their roles in simulation versus synthesis.

The session was highly informative and proved to be extremely beneficial in enhancing the students’ knowledge of core Verilog concepts and their real-world applications in digital system design. As a token of gratitude, Mr. Arun Upadhyaya presented a memento to the resource person. The event was efficiently hosted by Ms. Annapoorna Shenoy (6th Semester, ECE), while the overall coordination was well managed by Ms. Chandana (ISTE Department Coordinator) with the support of Mr. Sandeepa Prabhu (Co-curricular Cell Coordinator).